Targeting proteostasis in atrial fibrillation:Molecular footprints and novel therapeutic strategies

Boezemfibrilleren is een hardnekkige hartritmestoornis, die leidt tot een sterke toename van het aantal samentrekkingen per tijdseenheid in de spiercellen van de boezem (cardiomyocyten). De ritmestoornis is progressief en gaat gepaard met een verhoogde kans op het ontwikkelen van andere (hart)ziekten. Daarnaast is de kans op een succesvolle cardioversie in patiënten met persistent boezemfibrilleren kleiner dan in patiënten met paroxysmaal, of kort durend boezemfibrilleren. Dit komt omdat de normale functie van de cardiomyocyten in de boezem na cardioversie zich slechts langzaam of helemaal niet hersteld. De onderliggende oorzaak van het gebrek aan herstel is een ontspoorde eiwit expressie, vouwing en afbraak in de cel. Dit noemen wij ook wel ontsporing van de eiwit homeostase. Omdat eiwitten ervoor zorgen dat cellen, en dus organen, goed functioneren, is een goede balans in eiwit homeostase essentieel voor het functioneren van organen, dus ook het hart. In het proefschrift onderzoeken wij verschillende mogelijkheden om de ontsporing van de eiwit homeostase tegen te gaan en om te testen of deze kennis aanknopingspunten geeft voor nieuwe geneesmiddel therapieën. Wij hebben gevonden dat boezemfibrilleren gepaard gaat met vermindering van beschermende HSPs, activatie van HDAC6 en PARP1, en dat er meer endoplasmatisch reticulum-geïnduceerde autofagie plaatsvindt. We zien dan ook dat stoffen die HSPs boosten en HDAC6 en PARP1 remmen bescherming bieden tegen boezemfibrilleren. Verder zien we dat de chemische chaperon 4-PBA, ER stress voorkomt en daarmee boezemfibrilleren tegengaat. Deze bevindingen kunnen in de toekomst gebruikt worden als nieuwe therapeutische strategie in patiënten met boezemfibrilleren

High-Performance Composable Transactional Data Structures

Exploiting the parallelism in multiprocessor systems is a major challenge in the post ``power wall\u27\u27 era. Programming for multicore demands a change in the way we design and use fundamental data structures. Concurrent data structures allow scalable and thread-safe accesses to shared data. They provide operations that appear to take effect atomically when invoked individually. A main obstacle to the practical use of concurrent data structures is their inability to support composable operations, i.e., to execute multiple operations atomically in a transactional manner. The problem stems from the inability of concurrent data structure to ensure atomicity of transactions composed from operations on a single or multiple data structures instances. This greatly hinders software reuse because users can only invoke data structure operations in a limited number of ways. Existing solutions, such as software transactional memory (STM) and transactional boosting, manage transaction synchronization in an external layer separated from the data structure\u27s own thread-level concurrency control. Although this reduces programming effort, it leads to significant overhead associated with additional synchronization and the need to rollback aborted transactions. In this dissertation, I address the practicality and efficiency concerns by designing, implementing, and evaluating high-performance transactional data structures that facilitate the development of future highly concurrent software systems. Firstly, I present two methodologies for implementing high-performance transactional data structures based on existing concurrent data structures using either lock-based or lock-free synchronizations. For lock-based data structures, the idea is to treat data accessed by multiple operations as resources. The challenge is for each thread to acquire exclusive access to desired resources while preventing deadlock or starvation. Existing locking strategies, like two-phase locking and resource hierarchy, suffer from performance degradation under heavy contention, while lacking a desirable fairness guarantee. To overcome these issues, I introduce a scalable lock algorithm for shared-memory multiprocessors addressing the resource allocation problem. It is the first multi-resource lock algorithm that guarantees the strongest first-in, first-out (FIFO) fairness. For lock-free data structures, I present a methodology for transforming them into high-performance lock-free transactional data structures without revamping the data structures\u27 original synchronization design. My approach leverages the semantic knowledge of the data structure to eliminate the overhead of false conflicts and rollbacks. Secondly, I apply the proposed methodologies and present a suite of novel transactional search data structures in the form of an open source library. This is interesting not only because the fundamental importance of search data structures in computer science and their wide use in real world programs, but also because it demonstrate the implementation issues that arise when using the methodologies I have developed. This library is not only a compilation of a large number of fundamental data structures for multiprocessor applications, but also a framework for enabling composable transactions, and moreover, an infrastructure for continuous integration of new data structures. By taking such a top-down approach, I am able to identify and consider the interplay of data structure interface operations as a whole, which allows for scrutinizing their commutativity rules and hence opens up possibilities for design optimizations. Lastly, I evaluate the throughput of the proposed data structures using transactions with randomly generated operations on two difference hardware systems. To ensure the strongest possible competition, I chose the best performing alternatives from state-of-the-art locking protocols and transactional memory systems in the literature. The results show that it is straightforward to build efficient transactional data structures when using my multi-resource lock as a drop-in replacement for transactional boosted data structures. Furthermore, this work shows that it is possible to build efficient lock-free transactional data structures with all perceived benefits of lock-freedom and with performance far better than generic transactional memory systems

Performance Analysis of Indoor THz Communications with One-Bit Precoding

In this paper, the performance of indoor Terahertz (THz) communication systems with one-bit digital-to- analog converters (DACs) is investigated. Array-of- subarrays architecture is assumed for the antennas at the access points, where each RF chain uniquely activates a disjoint subset of antennas, each of which is connected to an exclusive phase shifter. Hybrid precoding, including maximum ratio transmission (MRT) and zero-forcing (ZF) precoding, is considered. The best beamsteering direction for the phase shifter in the large subarray antenna regime is first proved to be the direction of the line-of-sight (LoS) path. Subsequently, the closed-form expression of the lower- bound of the achievable rate in the large subarray antenna regime is derived, which is the same for both MRT and ZF and is independent of the transmit power. Numerical results validating the analysis are provided as well